FPGAs development in VHDL / Verilog language         MVD is a Xilinx certified design service center for FPGA development, and conventional design such as PCI interfaces developments and/or signal processing.         MVD makes use of Xilinx FPGAs in applications requiring customisation. This provides flexibility in upgrading the design after delivering the device to the final customer (updating is possible from the MVD offices), or when design performances require it.           Each of our designers develop an average of 5 to 10 FPGAs a year, depending on the complexity level.         Developements are usually performed in VHDL language, synthesised with the help of tools such as  Synplify-Pro or Certify from Synplicity, FPGA Express from Synopsys or XST from Xilinx; and simulated with Active HDL from ALDEC or ModelSim Verilog. LEONARDO Spectrum, for logical synthesis and MODELSIM for simulation will also be used.