First day

THE ARM ARCHITECTURE

• Overview of ARM
• ARM operation modes
• The ARM registers set, register organization summary according to the current mode
• Program Status Registers
• Exception handling, vector table, automatic switch into ARM mode
• Instruction sets : ARM branches and subroutines

ARM PROCESSOR CORE

• ARM7TDMI core signals
• ARM7TDMI block diagram
• The ARM7TDMI instruction pipeline
• ARM7TDMI memory interface
• ARM9TDMI datapaths
• ARM9TDMI pipeline
• Example ARM9TDMI system
• Overview of ARM9E-S, ARM10, StrongARM and Xscale

RealView DEVELOPPER SUITE (RVDS) OVERVIEW

• Using the core tools
• C/C++ compilers key features
• Supplied libraries
• Codewarrior introduction
• Debugging with multi-ICE

RVDS INTRODUCTORY WORKBOOK

• Compiling and running an example
• Creating a header file
• Creating a new project
• Viewing registers and memory

Second day

ARM AND THUMB INSTRUCTION SETS

• Conditional execution and flags
• Branch instructions
• The barrel shifter
• Immediate constants
• Single register data transfer
• Block data transfer
• Stack management
• Coprocessor instructions
• Register access in Thumb
• ARM architecture V5TE new instructions
• Assembler workbooks

ARM / THUMB INTERWORKING

• Switching between states
• Branch exchange example
• Mixing ARM and Thumb subroutines
• ARM to thumb veneer
• Thumb-to-ARM veneer
• Interworking calls
• Interworking using codewarrior

EXCEPTION HANDLING

• Exception return instructions
• Exception priority
• Vector table instructions
• Chaining exception handlers
• Register usage in exception handlers
• FIQ vs IRQ
• Example C interrupt handler
• Software managed interrupt controller
• Issues when reenabling interrupts
• C nested interrupt example
• Invoking SWIs
• Data abort with memory management
• The return address

COMPILER HINTS AND TIPS

• Automatic optimization
• Instruction scheduling
• Tail-call optimization
• Parameter passing
• Array and structure access
• Loop termination
• Division operations
• Inline assembler
• Stack usage
• Global data layout

Third day

INITIALIZING CACHED PROCESSORS

• Cache basics, associativity, cache lockdown
• Programmer's model
• Cache flushing
• Write buffer, cache write strategy
• Memory management, virtual to physical address mapping
• TLB and translation tables, level 1 and level 2 descriptors
• Address generation with process ID register
• Memory protection, MPU configuration steps
• System control coprocessor
• Example initialization code
• Tightly coupled memory

EMBEDDED SOFWARE DEVELOPMENT

• ROM or RAM at 0x0 ?
• ROM/RAM remapping
• Exception vector table
• Reset handler
• Initialization : stack pointers, code and data areas
• C library initialization
• Scatterloading
• Linker placement rules
• Long branch veneers
• C library functionality
• Placing the stack and heap
• Debugging ROM images

ARM DEBUG SOLUTIONS