Training - ColdFire MCF5272 (reference 003281A)
 
    Partners
  • This training course is approved by Freescale
  • Practical exercices are built with Diab Data compiler, downloaded on a MCF5272 target board through the EST probe
  • VisionClick debugger is used to control code execution
  • Windriver USB from Jungo is used to test the USB interface
  • Notice that MVD is a reseller of Jungo products
    
           
    Related Trainings
  • The course 003367A explains the operation of the Ethernet network
  • The course 002606A explains the operation of the USB bus
  • For programmers having to develop a BSP or a driver, the course 002603A called C language for real time and embedded applications is recommended
  • MVD also delivers training courses around embeded OS which can be useful : Embeded Linux, OSEK
    
           
    Prerequisites
  • Experience of a 32 bit processor or DSP is mandatory
    
           
  Course Objectives
  • Optimized code writing based on pipeline knowledge
  • Memory controller understanding, especially the SDRAM controller
  • Explaining the operation of the Fast Ethernet controller and particularly the buffer management
  • Initializing the USB interface to communicate with a host computer
    
           
    Duration
  • 3-day course
    
           
    Topics

(The full description of this course can be provided on request)

THE V2 COLDFIRE CORE

  • ColdFire core versions
  • Pipeline basics
  • Description of assembly instructions
  • Mac instructions, implementation of a fixed point DFT
  • ColdFire instruction set architecture enhancements
  • Stack management
  • C to assembly interface
  • Section definition
  • Exception management
  • Cache basics
  • 1-kB instruction cache operation
  • Programming region attributes in Access Control Registers
  • Internal 4-kB SRAM
  • Power management

DEBUG FACILITIES

  • Intrusive vs non-intrusive debug
  • BDM port
  • Hardware breakpoints
  • Trace port

RESET

  • Reset sources
  • Reset control flow
  • Chip mode selection
  • Boot device selection
  • Requirements of the boot routine

DEVICE CONFIGURATION

  • System Control Module
  • Internal bus arbitration
  • Clocking
  • The interrupt controller

HARDWARE IMPLEMENTATION

  • External bus signals
  • Dynamic bus sizing
  • Data transfer sequence
  • Burst cycles
  • External master interface
  • The memory controller
  • SDRAM basics
  • The SDRAM controller

TIMERS

  • Programmable Interrupt Timer Modules
  • The PWM module, programming frequence and duty cycle

THE DMA CONTROLLER

  • Dual address transfers, continuous-mode or cycle-steal transfers
  • Hardware interface, hardware initiated transfers
  • Burst transfers

COMMUNICATION CONTROLLERS

  • The 2 UARTs
  • UART basics, frame format
  • Line break generation
  • Transmit and receive sequences
  • The QSPI
  • SPI protocol basics
  • Baud rate selection, transfer delays
  • Command queue
  • Transmit and receive sequences
  • The PLIC [Physical Layer Interface Controller]
  • TDM communications basics, introduction to ISDN
  • Interface with the PHY : IDL vs GCI
  • Configuration of the interface
  • Transmit and receive sequences
  • The USB controller
  • USB protocol basics
  • Endpoint initialization, FIFO management
  • Data flow
  • The Fast Ethernet Controller
  • Ethernet basics
  • MII hardware interface
  • Buffer management, buffer chaining
  • Full duplex operation
  • Receive and transmit sequences
  • Error management
    
           
    Documentation

Training manuals will be given to participants during training. Precise and easy of use, those notes can be used as a reference afterwards. 		   
           
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If you want to know our other training courses and their contents, you can consult or download our complete training courses list on this page : Training courses - General presentation