IP Cores
 
DVB Cores
             
  DVB-C Modulator J.83 Annex A/C
The MVD DVB-C Modulator J.83 Annex A/C core is a drop-in module that includes the following functions : suivantes :
  • Input data framer from Microprocessor, MPEG_ASI or MPEG_SPI source (MPEG_TS flow
  • J83AC modulator (Energy dispersal, Reed Solomon encoder, QAM symbol mapper)
  • Programmable RRC filter for annex A and C
  • Flexible Digital Up Converter
  • Modulator for FI output
  • Output for simple DAC (14 bits) or complex DAC (2x16bits)
  • The MVD DVB-C core can be customized for specific application.

In option, it can include :

  • ASI interface core
  • Ethernet UDP core for video on IP
  • Direct 32 bit CPU interface for configuration parameters and MPEG_TS input flow

 
     

Core DVB-C Modulator J.83 Annex A/C    

  Cable Modulator J.83 Annex B
The MVD Cable Modulator J.83 Annex B core is a drop-in module that includes the following functions :
  • Input data framer from Microprocessor, MPEG_ASI or MPEG_SPI source (MPEG_TS flow)
  • J83B modulator (Energy dispersal, Reed Solomon encoder, QAM symbol mapper)
  • Programmable RRC filter
  • Flexible Digital Up Converter
  • Modulator for FI output
  • Output for simple DAC (14 bits) or complex DAC (2x16bits)

In option, it can include :

  • ASI interface core
  • Direct 32 bit CPU interface for configuration parameters and MPEG_TS input flow
  • Controller for internal BRAM
   
     

Core Cable Modulator J83 Annex B    

  DVB-S Modulator
Ready to use DVB-S compliant modulator coreˇ
For Virtex-5, Virtex-4 and Spartan-3/E/A FPGAs.ˇ
Flexible input and symbol rates.
Supported modes
  • Null Packet inserter Mode (User defined symbol rate)
  • Genlock Mode (Symbol rate automatically defined by the input rate)ˇ

Fully optimized single channel version.ˇ
Single clock (up to140 MHz+ for Spartan-3™,270 MHz+ for Virtex-4/5™ ˇ
Dynamically Programmable FEC - 1/2, 2/3, 3/4, 5/6, 7/8.ˇ
Dynamically programmable DUC

 
     

Core DVB-S Modulator    

    DVB-T/H Modulator
The MVD DVB-T/H modulator is a drop-in module that includes the following functions :
  • Input data framer from Microprocessor, MPEG_ASI or MPEG_SPI source (MPEG_TS flow)
  • DVB-T modulator
    • Energy dispersal
    • Reed Solomon encoder
    • Convolutional interleaver
    • FEC convolution encoder
    • Inner interleaver
    • QPSK/QAM symbol mapper
    • Framer with pilots & TPS inserter
    • IFFT and guard interval insertion
  • Flexible Digital Up Converter
  • Modulator for FI output
  • Output for simple DAC (14 bits) or complex DAC (2x16bits)

     

Core DVB-T/H Modulator    
             
             
Ethernet Cores
             
    UDP Transmit engine
Le core UDP Transmit engine Core est un module insérable qui inclut les fonctions suivantes :
  • Full hardware UDP encapsulation
  • Full hardware IP encapsulation
  • Auto-increment of the identification IP field
  • IP fragmentation not supported
  • Support all current FPGA families

 
             
     

Core UDP Transmit Engine    

    UDP Receive engine
The MVD UDP Receive engine core is a drop-in module that includes the following functions :
  • Full hardware UDP extraction
  • Full hardware IP extraction
  • Different programmable filters on protocol fields
  • IP fragmentation not supported
  • Directly connectable with the XILINX TEMAC
  • Programmable with a Microblaze or a PPC405
  • Up to 450 Mbits/secDesign up to 125 MHz for Virtex-4/5
   
             
     

Core UDP Receive Engine