3DES encryption/decryption 3DES  

The core is a drop-in module that includes the following functions :
  • 192-bit key size
  • Single or Triple Data Encryption Standard
  • Encryption or decryption functions are implemented in the core
  • Implements Triple DES to latest FIPS PUB 46-3
  • Drop-in module for Spartan®-6, Virtex®-6, Artix™-7, Kintex™-7 Virtex®-7 and Zynq™ FPGAs
  • Single clock
  • Supports 192-bit key size (168-bit cipher key with 24 additional parity bits)
  • Supports Single DES
  • Key Parity Checking
  • Same core can be used for encryption and decryption
  • Automatic Roundkey generation inside the core
  • ECB (Electronic Code Book) implementation per FIPS PUB 81
  • DES > 470Mbps @ 125MHz
  • 3DES > 150Mbps @ 125MHz
  • Full synthesizable RTL VHDL design (not delivered) for easy customization
  • Design delivered as Netlist

The 3DES core may be used in applications related to MPEG-TS stream encryption, or any other encryption applications.
Product brief        
Data sheet        
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Technique: support_cores@mvd-fpga.com