Training - MicroBlaze system implementation (reference 003149A)
 
    Notice
  • This training has been designed to show the capabilities of the MicroBlaze using Embedded Development Kit
  • It is a good way to discover the development environment required to develop System On Chip based on MicroBlaze
    
           
    Partners
  • Do not hesitate to request the detailed course description by contacting training@mvd-fpga.com
  • This training course is approved by Xilinx
  • Practical exercises are built with GNU compiler, downloaded onto a Virtex-II Pro evaluation board through the Xilinx Probe
  • GDB debugger is used to control code execution
    
           
    Related trainings
    
           
    Prerequisites
  • Experience of a 32 bit processor or DSP is recommended
  • Experience of FPGA design using VHDL is recommended
    
           
    Course objectives
  • A description of MicroBlaze core is done
  • The design of project facilitates the understanding of the hardware design flow and software design flow
  • Software and hardware debug strategies are highlighted
  • Optimization using profiling library and customer IP is covered
  • The course explains how a microblaze System-On-Chip may be simulated as well as Bus Functional Model simulation
    
           
    Duration
  • 4-day course
    
           
    Topics

(The full description of this course can be provided on request)

VARIOUS SYSTEM ON CHIP OFFERED BY XILINX

  • Picoblaze
  • Microblaze
  • PPC405

THE MICROBLAZE CORE ARCHITECTURE

  • Overview
  • The pipeline
  • Load/Store architecture
  • Programming model
  • Exceptions Mechanism
  • Fast Simplex Link Interface
  • Harvard Architecture
  • Cache Unit
  • Floating Point Unit
  • Instructions Set

MICROBLAZE CONNECTIONS AND PARAMETERS

  • Introduction
  • LMB
  • OPB
  • FSL
  • Bus Configuration
  • Others IO
  • Microblaze Parameters

EDK OVERVIEW

  • Introduction
  • XPS Overview

THE HARDWARE FLOW

  • MHS file
  • SoC Hardware Specification
  • IP Definition files
  • Platgen and Implementation tools

APPLICATION BINARY INTERFACE

  • Introduction
  • Data Types
  • Registers Usage Convention
  • Structure Allocation
  • Function Call and Return Sequence
  • GNU Compiler
  • Linker script file

THE SOFTWARE FLOW

  • Steps of Code generation
  • MSS file
  • Software Platform Specification
  • Xilinx Peripherals Drivers
  • CSP
  • Xilinx libraries
  • Libgen
  • Software Applications Creation
  • Update Bitstream

DEBUGGING A MICROBLAZE APPLICATION

  • XMD
  • GDB
  • Chipscope Pro

OPTIMIZATION

  • Profiling
  • Create a customer IP

SIMULATION

  • SOC Simulation
  • BFM Simulation
    
           
    Documentation

Training manuals will be given to participants during training. Precise and easy of use, those notes can be used as a reference afterwards. 		   
           
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