DVB-S Modulator Core
 
    Included modules

The MVD_DVB-S modulator includes all the processing functions between the MPEG_TS input and the DAC. It can be parameterized by using a very simple microprocessor like interface.
  • Real Time Controller & Null packet inserter
  • Energy dispersal
  • Reed-Solomon encoder
  • Convolutional Interleaver
  • FEC Convolution Encoder
  • I & Q RCC Filter
  • DAC Sample rate Interpolation
  • Adjustable Intermediate Frequency by Digital Up Converter
   
             
    MVD optional modules
  • Ethernet UDP Receiver (10/100/1000)
    • Up to 300 Mbit/s+ input rate
    • Available for Virtex-5™, Virtex-4™ and Spartan™-3/E/A
  • ASI Receiver
    • 270 Mbit/s input
    • Auto data rate
    • MPEG Frame recovery
    • One to one interface with RTC Module
  • Modulator Controller Interface.
    • Provides support to dynamically setup all modulator parameters.
  • DAC Setup Module
    • Provides support for DAC setup and calibration
   
           
    Features

Ready to use DVB-S compliant modulator core

  • For Virtex-5, Virtex-4 and Spartan-3/E/A FPGAs
  • Flexible input and symbol rates
  • Supported modes :
    • Null Packet inserter Mode (User defined symbol rate)
    • Genlock Mode (Symbol rate automatically defined by the input rate)
  • Fully optimized single channel version
  • Single clock (up to140 MHz+ for Spartan-3™,270 MHz+ for Virtex-4/5™
  • Dynamically Programmable FEC
    • 1/2, 2/3, 3/4, 5/6, 7/8
  • Dynamically programmable DUC
  • Deliverables :
    • NGC or EDN files for specified FPGA family
    • Back annotated VHDL for simulation
    • Detailed datasheet and user’s guide
  • Full behavioral VHDL design available (option)
   
    Applications

Low cost, fully integrated DVB-S compliant satellite transmitter modulator
   
             
    Support

MVD provides a wide choice of options for support : Optional companion cores, design services, on site or remote support as well as on site training.
   
           
           
                       
      The block diagram shows the basic modulator implementation. The RTC and Null Packet Inserter module provides the necessary timing and frame resynchronization to the modulator, please refer to DVB-S documentation to a detailed DVB-S encoder process and DVB-S core's functional description.The modulator includes a dual channel RRC Filter plus a dual channel multi-rate interpolation. Both modules limit the intermediate frequency bandwidth and re-sample the symbol rate to match the DAC input data rate.The DUC is dynamically adjustable and provides a direct interface with the external DAC (no glue logic is used).Detailled information available on request.    
                       
      Documentation

    Contacts

 
Sales informations : info_cores@mvd-fpga.com
Technical support : support_cores@mvd-fpga.com