100 Mbps ETHERNET BASICS

• MAC layer, frame format, frame filtering
• Full duplex Ethernet vs CSMA/CD
• PHY layer, scrambling, 4b/5b coding, NRZI
• Auto-negotiation, utilization of FLPs
• MII

1 Gbps ETHERNET BASICS

• 1000BASE-T
• 1000BASE-X
• GMII transfer protocol, RGMII, SGMII

802.1Q BASICS

• Spanning tree algorithm, RSTP, MSTP
• VLAN tag, selecting one tree and selecting the priority of a frame
• Port states
• Automatic address learning
• Automatic address aging
• Handling multicasts, GVRP, IGMP snooping

INTRODUCTION TO 88E6161 SWITCHES

• Block diagram, ports 0-3 features
• Port 4 and port 5 operating modes
• Pin strapping
• Application examples

BASIC SWITCH FUNCTIONS

• MACs
• PPU
• RMON registers
• Basic switch operation
• 802.1X source address authentication
• Multiple FIDs in VLAN systems

NORMAL PORTS

• Ingress policy
• VLANs
• Special frame handling
• QOS qualification
• Port-based Ingress Rate Limiting
• Queue Controller
• Egress policy

PROVIDER PORTS

• Distinguishing S-TAG from C-TAG
• Customer-to-Provider trafic
• Provider-to-Customer traffic
• Customer-to-Customer traffic
• Provider-to-Provider traffic

DSA PORTS

• Implementing control traffic between switches and management CPU
• Forward DSA tag
• TO_CPU DSA tag
• FROM_CPU DSA tag
• Interconnecting switches by using cross-chip links
• Switch handling of DSA frames
• Secure Control Technology

ADVANCED SWITCH FUNCTIONS

• Spanning Tree support
• Ingress MGMT/BPDU frame detection
• Proper connection to a management CPU and to a router
• Port mirroring
• Port trunking support
• PTP implementation

ACCESSING SWITCH REGISTERS

• The 16 register groups
• Multi-chip addressing mode
• Single-chip direct access to registers
• Remote Management frames

PHY LAYER

• Transmit PCS and PMA
• Receive PCS and PMA
• Power management
• Far End Fault indication
• Auto MDI/MDIX crossover
• LED interface
• Accessing PHY registers, MDC/MDIO interface
• Auto-configuration

SOFTWARE ARCHITECTURE