The MPEG User Data inserter core allows inserting user data into the payload of up to 16 Video MPEG elementary streams.
The MPEG-TS User Data inserter core can manage up to 16 video payloads.
The timing insertion is programmable thanks to 32-bit CPU interface.
It includes full PCR re-stamping of the complete modified stream.
- Supported FPGA families:
Spartan®-6, Virtex®-6/7, Kintex™-7, Artix™-7, Zynq™
- 1 SPI input / 1 SPI output
- Compliant with DVB and ATSC standard
- Insertion of DTV-708 closed caption into
payload of MPEG video elementary stream
- CPU configuration and monitoring interface
- Full PCR re-stamping
- Full synthesizable RTL design (not delivered)
for easy customization
- Netlist version available for ISE 14.1 and