Serial Interface
     
         
  The Serial Interface core allows parameters setting and status reading of MVD Cores modulators. Serial Interface block diagram  
         
Description

The Serial Interface core allows parameters setting and status reading of MVD Cores modulators.		   Features

Input interface can be:

  • Slave 400 KHz I2C interface for an 9-bit register
  • 9 600 or 115 200 Bauds UART interface, 8 bits, no parity, 1 STOP bit
Applications

The Serial Interface core can be used with any MVD modulators cores when local CPU is not available.		    
Documentation
Data sheet        
Application note "From MPEG-TS to RF"
           
Contact
Sales: info_cores@mvd-fpga.com
Technique: support_cores@mvd-fpga.com