J.83 Annex B cable modulator
     
       
         
  J.83 Annex B cable modulator
  
         
  The J.83B cable modulator modulates an MPEG-TS DVB-SPI input into a QAM-16/256 output in baseband I/Q. J.83B QAM modulator block diagram  
         
Description

The MVD Cable modulator J83B core is a drop-in module for FPGA that includes the following functions:
  • Input data framer from DVB-SPI source (MPEG-TS flow)
  • J83B modulator
    • Checksum
    • Reed Solomon encoder
    • Interleaver
    • Trellis Coded Modulation
  • Output for complex DAC (2x8 bits)
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  Features
  • ITU-T J.83 Annex B compliant baseband transmitter for Cable Modem Termination Systems (CMTS)
  • Supported FPGA families: Spartan®-6, Virtex®-6/7, Kintex™-7, Artix™-7, Zynq™
  • Single clock (up to 160 MHz)
  • Robust SPI input (discarding of incorrect input packets)
  • PCR re-stamping
  • Supports 5.056941 & 5.360537 symbol rates
  • Programmable 64 and 256 QAM Symbol Mapping
  • All interleaver modes can be implemented as internal memory
  • Complex baseband outputs (2 x 8 bits) @ Fsymbol rate
  • Full synthetizable RTL VHDL design (not delivered) for easy customization
  • Design delivered as Netlist
  • MER > 42dB
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Applications

The MVD Cable modulator J83B core may be used in applications related to cable transmission, typically at the cable head end.

The MVD J.83B modulator core is delivered for baseband output to be natively connected to AD9789 DAC from Analog Devices.
When associated to our Up Sampler IP core, it can be used in Intermediate Frequency applications with IF DAC such as AD9744 from Analog Devices 
When associated to our Up Sampler and Up Converter IP cores, it can be used in RF applications with RF DAC such as AD9739A from Analog Devices or MAX5881 from Maxim.

Companion cores

    
Documentation
Product brief        
Data sheet        
           
Contact
Sales: info_cores@mvd-fpga.com
Technique: support_cores@mvd-fpga.com