DVB-C J.83 Annex A/C modulator
  DVB-C
         
  DVB-C J.83 Annex A/C modulator  
         
  The DVB-C J.83A/C cable modulator modulates an MPEG-TS DVB-SPI input into a QAM-16/32/65/128/256 output in base band I/Q. DVB-C J.83A/C QAM modulator block diagram  
         
Description

The MVD DVB-C Modulator J.83 Annex A/C core is a drop-in module for FPGA that includes the following functions:
  • Input data framer from DVB-SPI source (MPEG-TS flow)
  • J.83AC modulator:
    • Energy dispersal
    • Reed Solomon encoder
    • Interleaver
    • QAM symbol mapper
  • Output for complex DAC (2 x 8 bits)
  Features
  • ITU-T J.83 Annex A/C, DVB-C (ETS 300 429) compliant baseband transmitter for Cable Modem Termination Systems (CMTS)
  • Supported FPGA families: Spartan®-6, Virtex®-6/7, Kintex™-7, Artix™-7, Zynq™
  • Single clock
  • Robust SPI input (discarding of incorrect input packets)
  • PCR re-stamping
  • Supports programmable symbol rates
  • Programmable 16, 32, 64, 128 and 256 QAM Symbol Mapping
  • Intermediate frequency output for single DAC (14 bits) or complex DAC (2 x 16 bits)
  • Single channel - support for multiple channels
  • Full synthetizable RTL VHDL design (not delivered) for easy customization
  • Design delivered as Netlist
  • MER > 42 dB
Applications

The DVB-C Modulator J.83 Annex A/C Core may be used in applications related to cable transmission, typically at the cable head end.

The MVD DVB-C modulator core is delivered for baseband output to be natively connected to AD9789 DAC from Analog Devices.
When associated to our Up Sampler IP core, it can be used in Intermediate Frequency applications with IF DAC such as
AD9744 from Analog Devices 
When associated to our Up Sampler and Up Converter IP cores, it can be used in RF applications with RF DAC such as AD9739A from Analog Devices or MAX5881 from Maxim.

Companion cores


   
Documentation
Product brief        
Data sheet        
           
Contact
Sales: info_cores@mvd-fpga.com
Technique: support_cores@mvd-fpga.com