Description
The MVD DVB-S core is a drop-in module
for FPGA that includes the following
functions:
- Input data framer from DVB-SPI
source (MPEG-TS flow)
- Modulator
- Energy dispersal
- Reed Solomon encoder
- Enterleaver
- Convolution encoder and
puncturing
- RRC filter
- Flexible Digital Up Sampler
- Output for complex DAC (2x16bits)
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Features
DVB-S (ETS 300 421) compliant baseband
transmitter for Satelliter Modem
Termination Systems (SMTS)
- Supported FPGA families: Spartan®-6, Virtex®-6/7, Kintex™-7, Artix™-7, Zynq™
- Single clock
- Robust SPI input (discarding of
incorrect input packets)
- PCR re-stamping
- Supports programmable symbol
rates
- Programmable 1/2, 2/3, 3/4, 5/6
and 7/8 punctured FEC
- Complex base band output (2 x 16
bits)
- Single channel support for
multi channel
- Full synthetizable RTL VHDL
design (not delivered) for easy
customization
- Design delivered as Netlist
- MER > 40dB
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