• Full hardware UDP/IP Stack IP
  
• RTP Receiver IP
  
• TS Jitter Cleaner IP (optional)
  De-buffering and de-jittering of MPEG-TS packets
  
• MDIO STA Management Interface IP (optional)
  Control of the Ethernet PHY
  
• UDP CPU Interface IP (optional)
  Can be used to configure any MVD IP cores y using Ethernet network, when no local CPU is available

• 1 x Ethernet 100/1000 input
  (the maximum number of UDP/RTP channels depends on the FPGA resources, Ethernet speed connection and bit rate of input flows)
• n x MPEG TS outputs (DVB-SPI)

For detailed features of each of IP cores used, please refer to their related web pages or to products briefs below.

Note

A bi-directional IPTV Transmitter/Receiver can also be considered (see IPTV Transmitter)
In this case, the UDP/IP Stack IP can be instanced once only.